DITHERING CIRCUIT FOR SAMPLING SERIAL DATA TRANSMISSION
A system for determining a unit time of a serial transmission protocol, wherein the serial transmission protocol defines a unit time (UT) by transmitting a calibration pulse having a predetermined length of N*UT and wherein a receiver is operated by system clock, includes: a clock divider for dividi...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
02.12.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A system for determining a unit time of a serial transmission protocol, wherein the serial transmission protocol defines a unit time (UT) by transmitting a calibration pulse having a predetermined length of N*UT and wherein a receiver is operated by system clock, includes: a clock divider for dividing the system dock by M, wherein M evenly divides N, and a detector for sampling a received data nibble length by using a dithered sampling clock. |
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Bibliography: | Application Number: EP20140711432 |