Bimodal serial link CDR architecture

A system for generating a local clock, configurable to utilize a forwarded clock and a data stream, or a data stream only, as frequency and phase references. In one embodiment, the system includes a phase locked loop that may be referenced to a forwarded clock, or to a phase reference formed from re...

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Bibliographic Details
Main Authors SONG, SANQUAN, AMIRKHANY, AMIR
Format Patent
LanguageEnglish
French
German
Published 10.06.2015
Subjects
ADVERTISING
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
CRYPTOGRAPHY
DISPLAY
EDUCATION
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PHYSICS
SEALS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:A system for generating a local clock, configurable to utilize a forwarded clock and a data stream, or a data stream only, as frequency and phase references. In one embodiment, the system includes a phase locked loop that may be referenced to a forwarded clock, or to a phase reference formed from received data, utilizing a sampler, a crossing sampler, and a bang-bang phase detector. The system includes a local phase recovery loop which may utilize the bang-bang phase detector as part of a phase detector for controlling a phase interpolator, the output of the phase interpolator serving as the local clock for clocking received data.
Bibliography:Application Number: EP20140195592