System and method for manufacturing a cavity down fabricated carrier

A method of fabricating a receptacle down BGA carrier having a top surface and a bottom surface, the method comprising combining a conductive portion and a molded dielectric portion, said dielectric portion having an inner surface intersecting said top surface, said inner surface forming a cavity fo...

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Bibliographic Details
Main Author CHEUNG, KA WA
Format Patent
LanguageEnglish
French
German
Published 12.08.2015
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of fabricating a receptacle down BGA carrier having a top surface and a bottom surface, the method comprising combining a conductive portion and a molded dielectric portion, said dielectric portion having an inner surface intersecting said top surface, said inner surface forming a cavity for receiving a die; selectively etching part of said conductive portion; and applying solder resist to a portion of a top surface of said conductive portion.
Bibliography:Application Number: EP20140196619