METHOD AND CIRCUIT FOR CONTROLLED GAIN REDUCTION OF A GAIN STAGE

• Main Author: Kronmueller, Frank
• Format: Patent
• Language: English; French; German
• Published: 18.09.2019
• Subjects: AMPLIFIERS; BASIC ELECTRONIC CIRCUITRY; CONTROLLING; ELECTRICITY; MEASURING; MEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUIDLEVEL; METERING BY VOLUME; PHYSICS; REGULATING; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES; TESTING

The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier (100, 200) is described. The multi-stage amplifier comprises a first amplification stage (101) configured to provide a stage output voltage at a stage output node (255). Furthermore, the amplifier comprises an intermediate amplification stage (102) comprising an amplifier current source (261) configured to provide an amplifier current and an amplifier transistor (260) arranged in series with the amplifier current source. A gate of the amplifier transistor (260) is coupled to the stage output node (255) of the first amplification stage (101). The intermediate amplification stage (102) is configured to provide an amplified or attenuated stage output voltage at a midpoint (262) between the amplifier current source (261) and the amplifier transistor (260). Furthermore, the amplifier comprises a gain control circuit (300) configured to reduce an effective output impedance of the amplifier transistor (260) by providing a current feedback to the midpoint (262).