Fault tolerant fail-safe link
The present disclosure is generally directed to a plurality of solid state switches of varying periphery sizes connected in series between a power source and a load. A built-in test circuit senses an overvoltage condition across one or more of the solid state switches of varying periphery sizes and...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
16.04.2014
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Subjects | |
Online Access | Get full text |
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Summary: | The present disclosure is generally directed to a plurality of solid state switches of varying periphery sizes connected in series between a power source and a load. A built-in test circuit senses an overvoltage condition across one or more of the solid state switches of varying periphery sizes and opens or closes the one or more of the solid state switches of varying periphery sizes in accordance with a measured voltage across at least one solid state switch of the plurality of solid state switches. |
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Bibliography: | Application Number: EP20130187535 |