Methods and apparatus for automatic fault detection
Techniques and mechanisms are provided to monitor signals including critical signals at the endpoints, or leaves, of one or more signal trees in an integrated circuit device. Sensors or layers of sensors may be configured in fault detection circuitry to monitor signals and compare them to static or...
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Main Author | |
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Format | Patent |
Language | English French German |
Published |
30.05.2018
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Subjects | |
Online Access | Get full text |
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Summary: | Techniques and mechanisms are provided to monitor signals including critical signals at the endpoints, or leaves, of one or more signal trees in an integrated circuit device. Sensors or layers of sensors may be configured in fault detection circuitry to monitor signals and compare them to static or dynamically varying values. The fault detection circuits may include OR-gate daisy chains that output a fault detection signal to control circuitry if any signal at a particular leaf deviates from an expected signal. Fault detection circuits may also be configured to identify instances where two or more or N or more signals deviate from an expected signal. Mechanisms may also be provided to assure the reliability of fault detection circuitry itself. |
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Bibliography: | Application Number: EP20130155874 |