MOSFET mismatch characterization circuit

A semiconductor device comprises a plurality of transistor mismatch circuits (104, 202) formed on a semiconductor wafer (101); and a characterization circuit (206) formed on the semiconductor wafer. The characterization circuit (206) is connected to receive input provided by the transistor mismatch...

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Bibliographic Details
Main Authors McAndrew, Colin C, Braswell, Brandt
Format Patent
LanguageEnglish
French
German
Published 07.10.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device comprises a plurality of transistor mismatch circuits (104, 202) formed on a semiconductor wafer (101); and a characterization circuit (206) formed on the semiconductor wafer. The characterization circuit (206) is connected to receive input provided by the transistor mismatch circuits simultaneously which themselves receive inputs from the mismatch circuits simultaneously and is configured to output a standard deviation of mismatch between transistors (208/212, 210/214) in the mismatch circuits.
Bibliography:Application Number: EP20120179305