PREDETERMINED DUTY CYCLE SIGNAL GENERATOR

Techniques for generating a signal having a predetermined duty cycle. In an exemplary embodiment, a first counter is configured to count a first number of cycles of an oscillator signal, and a second counter is configured to count a second number of cycles of the oscillator signal, with the second n...

Full description

Saved in:
Bibliographic Details
Main Authors ZHANG, Kun, BARNETT, Kenneth Charles
Format Patent
LanguageEnglish
French
German
Published 19.04.2017
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Techniques for generating a signal having a predetermined duty cycle. In an exemplary embodiment, a first counter is configured to count a first number of cycles of an oscillator signal, and a second counter is configured to count a second number of cycles of the oscillator signal, with the second number being greater than the first number. The output of the second counter is used to reset the first and second counters, while the outputs of the first and second counters further drive a toggle latch for generating the signal having predetermined duty cycle. Further aspects include techniques for accommodating odd and even values for the second number.
Bibliography:Application Number: EP20100730946