IMPROVEMENTS RELATING TO DATA PROCESSING ARCHITECTURE

A parallel processor is described which is operated in a SIMD manner. The processor comprises: a plurality of processing elements connected in a string and grouped into a plurality of processing units, wherein each processing unit comprises a plurality of processing elements which each have direct i...

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Bibliographic Details
Main Authors WHITAKER, Martin, LANCASTER, John
Format Patent
LanguageEnglish
French
German
Published 13.12.2017
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Summary:A parallel processor is described which is operated in a SIMD manner. The processor comprises: a plurality of processing elements connected in a string and grouped into a plurality of processing units, wherein each processing unit comprises a plurality of processing elements which each have direct interconnections with all of the other processing elements within the respective processing unit, the interconnections enabling data transfer between any two elements within a unit to be effected in a single clock cycle.
Bibliography:Application Number: EP20090750090