INTEGRATED CIRCUIT WITH SECONDARY-MEMORY CONTROLLER FOR PROVIDING A SLEEP STATE FOR REDUCED POWER CONSUMPTION AND METHOD THEREFOR
A method comprising determining that a minimum operation level of an integrated circuit (100) has been reached and that a sleep mode is therefore allowable; storing minimum operation context information to a RAM (115) in response to determining that the minimum operation level has been reached; swit...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English French German |
Published |
06.02.2013
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A method comprising determining that a minimum operation level of an integrated circuit (100) has been reached and that a sleep mode is therefore allowable; storing minimum operation context information to a RAM (115) in response to determining that the minimum operation level has been reached; switching to a sleep mode code (116) in the RAM (115); and transferring memory control from a primary memory controller (104) to a secondary memory controller (112) wherein only the secondary memory controller (112) controls the RAM (115). The method may include storing the sleep mode code (116) and a wakeup code (117) in the RAM (115) in response to determining that sleep mode is allowable, where the wakeup code (117) restores a minimum operation context using the minimum operation context information stored in the RAM (115). The method may also include placing a plurality of integrated circuit power islands into a sleep mode and leaving a secondary memory controller power island (109) in a normal power mode. |
---|---|
Bibliography: | Application Number: EP20090749362 |