METHOD AND APPARATUS FOR PREVENTING FLUCTUATIONS IN A DIGITALLY PRODUCED OUTPUT CLOCK SIGNAL

The apparatus for preventing fluctuations in a digitally produced output clock signal contains a digital clock generator (19), a buffer (29), a filling-level measuring device (28) and a regulator (21). The buffer (29) stores a digital signal received with an input clock signal and outputs it with an...

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Bibliographic Details
Main Authors MEIER, NICLAS, BALZ, CHRISTOPH
Format Patent
LanguageEnglish
French
German
Published 23.03.2011
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:The apparatus for preventing fluctuations in a digitally produced output clock signal contains a digital clock generator (19), a buffer (29), a filling-level measuring device (28) and a regulator (21). The buffer (29) stores a digital signal received with an input clock signal and outputs it with an output clock signal. The filling-level measuring device (28) measures the filling level of the buffer (29). The regulator (21) uses the filling level of the buffer (29) to regulate the frequency of the digitally produced output clock signal. The discrepancy between the input clock signal and the output clock signal is the disturbance variable for the regulation. The apparatus also contains a compensation device (16) which performs an additional coarse estimation of the disturbance variable for the regulation and uses it to pre-compensate for the output clock signal.
Bibliography:Application Number: EP20080802858