METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES

• Main Authors: McLELLAN, Neil, CHAN, Vincent, TOPACIO, Roden
• Format: Patent
• Language: English; French; German
• Published: 03.06.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated temperatures respectively; mounting the substrate panel at about the first elevated temperature to the carrier, the carrier being at said second elevated temperature, to provide a connection between the carrier and the substrate panel; and cooling the carrier and the substrate panel from the first and second elevated temperatures thereby putting the substrate panel into tension in at least one direction. A stiffener panel may be affixed to the substrate panel and heated to an elevated temperature and while the substrate panel is heated to an elevated temperature. A plurality of dies may be mounted and electrically connected to the substrate panel. Under-filling of the plurality of dies may occur with the stiffener panel affixed to the substrate panel.