GATE-COUPLED EPROM CELL FOR PRINTHEAD

An EPROM cell in a printhead control circuit for an inkjet printer, having exactly one polysilicon layer and a conductive layer disposed above the polysilicon layer, includes a control transistor and an EPROM transistor. The control and EPROM transistors each have floating gates comprising a portion...

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Bibliographic Details
Main Author BENJAMIN, Trudy, L
Format Patent
LanguageEnglish
French
German
Published 06.10.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:An EPROM cell in a printhead control circuit for an inkjet printer, having exactly one polysilicon layer and a conductive layer disposed above the polysilicon layer, includes a control transistor and an EPROM transistor. The control and EPROM transistors each have floating gates comprising a portion of the polysilicon layer, and an electrical interconnection, comprising a portion of the conductive layer, interconnects the floating gate of the control transistor and the floating gate of the EPROM transistor.
Bibliography:Application Number: EP20070778530