METHOD AND CIRCUIT ARRANGEMENT FOR VERIFYING ELECTRIC CONTACTS BETWEEN A FIRST OUTPUT PIN OF A FIRST POWER CIRCUIT BREAKER OF A POWER CIRCUIT BREAKER DEVICE AND AN EXTERNAL NODE AND A SECOND OUTPUT PIN OF A SECOND POWER CIRCUIT BREAKER OF SAID POWER CIRCUIT BREAKER DEVICE AND NODE
Resistors (7,8) are connected to form voltage divider between test voltage (Vt) and earth (13). Comparators (11,12) test if electrical contact (1a) exists between output pin (2) and power switch (3) and contact (1b) exists between output pin (4) and power switch (5). Comparator (11) compares first v...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English French German |
Published |
17.10.2007
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | Resistors (7,8) are connected to form voltage divider between test voltage (Vt) and earth (13). Comparators (11,12) test if electrical contact (1a) exists between output pin (2) and power switch (3) and contact (1b) exists between output pin (4) and power switch (5). Comparator (11) compares first voltage (U1) at output pin (2) with first reference voltage (Uref) and second comparator (12) compares second voltage (U2) at output pin (4) with reference voltage. An interruption of contact 1a or 1b indicated by the voltage logic level, shows that the device (6) is faulty. An independent claim is also included for a circuit arrangement for verifying of electrical contact between an output pin (2,4) of a power switch (3,5) and an external node. |
---|---|
Bibliography: | Application Number: EP20050816268 |