Inversion bit line, charge trapping non-volatile memory and method of operating same

• Main Author: LUNG, HSIANG-LAN
• Format: Patent
• Language: English; French; German
• Published: 15.09.2010
• Subjects: ELECTRICITY; INFORMATION STORAGE; PHYSICS; STATIC STORES

A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cells are adapted to store two bits, one on the left side and one on the right side of the charge trapping structure. A positive threshold voltage erase state is indu...