Inversion bit line, charge trapping non-volatile memory and method of operating same

A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cells are adapted to store two bits, one on the left side and one on the right side of the charge trapping structure. A positive threshold voltage erase state is indu...

Full description

Saved in:
Bibliographic Details
Main Author LUNG, HSIANG-LAN
Format Patent
LanguageEnglish
French
German
Published 15.09.2010
Subjects
Online AccessGet full text

Cover

Loading…
Abstract A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cells are adapted to store two bits, one on the left side and one on the right side of the charge trapping structure. A positive threshold voltage erase state is induced using negative gate voltage Fowler Nordheim FN tunneling which establishes a charge balanced condition at a positive voltage. A low current, source side, hot electron injection programming method is used.
AbstractList A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cells are adapted to store two bits, one on the left side and one on the right side of the charge trapping structure. A positive threshold voltage erase state is induced using negative gate voltage Fowler Nordheim FN tunneling which establishes a charge balanced condition at a positive voltage. A low current, source side, hot electron injection programming method is used.
Author LUNG, HSIANG-LAN
Author_xml – fullname: LUNG, HSIANG-LAN
BookMark eNqNyr0KwjAUxfEMOvj1DvcB7BBE6qxUdHPoXmJ72gaSe0MSCr69GXwAp_OH89uqFQtjo9onL4jJCtPbZnKWcaR-NnEC5WhCsDxRodUizmTrQB5e4ocMDyXzLAPJSBIQy11sMh57tR6NSzj8dqfo3rS3R4UgHVIwPRi5a1661vVFn6_69Af5AkkrOgc
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
DocumentTitleAlternate Ligne de bit d'inversion, mémoire non volatile à piegeage de charges et procédé de son fonctionnement
Inversionsbitleitung, nicht flüchtiger Ladungsabfangspeicher und Verfahren zu dessen Betrieb
ExternalDocumentID EP1717815B1
GroupedDBID EVB
ID FETCH-epo_espacenet_EP1717815B13
IEDL.DBID EVB
IngestDate Fri Aug 16 05:48:48 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
French
German
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_EP1717815B13
Notes Application Number: EP20050010867
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100915&DB=EPODOC&CC=EP&NR=1717815B1
ParticipantIDs epo_espacenet_EP1717815B1
PublicationCentury 2000
PublicationDate 20100915
PublicationDateYYYYMMDD 2010-09-15
PublicationDate_xml – month: 09
  year: 2010
  text: 20100915
  day: 15
PublicationDecade 2010
PublicationYear 2010
RelatedCompanies MACRONIX INTERNATIONAL CO., LTD
RelatedCompanies_xml – name: MACRONIX INTERNATIONAL CO., LTD
Score 2.7879097
Snippet A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cells are adapted to...
SourceID epo
SourceType Open Access Repository
SubjectTerms ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
Title Inversion bit line, charge trapping non-volatile memory and method of operating same
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100915&DB=EPODOC&locale=&CC=EP&NR=1717815B1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LSwMxEB5Kfd60KtYXOcieDG7ch7uHInQfFKEPpEpvZbNJSsE-6K6I_95Juq1e9BaSMCQDk8yXzHwDcOuK0A0U96ivck5dxCA0ELmgGctFbqtA2bZOFO72_M6r-zzyRjWYbnJhDE_opyFHRIvK0d5Lc14vfx6xYhNbWdzzKXYtntJhK7YqdMzQY2CeFbdbyaAf9yMrirBl9V5aDGFLwLw2AqUd7UVrmv3kra2TUpa_b5T0CHYHKGxeHkNNzhtwEG0KrzVgv1v9dzdgzwRo5gV2VkZYnMBQc2OYVy7CpyXRfuIdMYxHkpSrTBMuTAiieoonD27lXZKZDqf9ItlckHXFaLJQZLHUfMp6bpHN5CmQNBlGHYoLHW-VMk4G2y05Z1BHqfIciPPgCNtxQuUjDPJQ1z5nmVRuKNzHTDHehOafYi7-GbuEw_W3eUiZdwX1cvUhr_E2LvmN0eM3uNCQPA
link.rule.ids 230,309,786,891,25594,76903
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LSwMxEB5KfdSbVsX6zEH2ZHDjPrp7KEJ3W6r2hazSW9nsJrJgH3RXxH_vJH3oRW8hCUMyMDP5kpkvANd26tue5A51ZcKpjRiEemmS0pglaWJKT5qmKhTu9d3Oi_04ckYlyNa1MJon9FOTI6JFJWjvhfbX859LrFDnVua3PMOu2X07aoTGCh0zPDEwxwibjdZwEA4CIwiwZfSfGwxhi8ecJgKlrToiQo2UXpuqKGX-O6K092F7iMKmxQGUxLQKlWD98VoVdnur9-4q7OgEzSTHzpUR5ocQKW4MfctFeFYQdU68IZrxSJBiESvChTeCqJ6i58GtvAsyUem0XySepmT5YzSZSTKbKz5lNTePJ-IISLsVBR2KCx1vlDJuDTdbso6hjFLFCRDrzkpNy_KlizDIQV27nMVC2n5q12PJeA1qf4o5_WfsCiqdqNcddx_6T2ewt3xC9ylzzqFcLD7EBUbmgl9qnX4DnM2TJg
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Inversion+bit+line%2C+charge+trapping+non-volatile+memory+and+method+of+operating+same&rft.inventor=LUNG%2C+HSIANG-LAN&rft.date=2010-09-15&rft.externalDBID=B1&rft.externalDocID=EP1717815B1