Hardware error control method in an instruction control apparatus having an instruction processing suspension unit

In the instruction control apparatus having an instruction processing suspension unit (100) andanerror detection unit (200), in order to improve the reliability of the apparatus, the apparatus is configured in such a way that when an error occurs to certain hardware resources in the instruction proc...

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Bibliographic Details
Main Author GOMYO, NORIHITO
Format Patent
LanguageEnglish
French
German
Published 13.01.2010
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In the instruction control apparatus having an instruction processing suspension unit (100) andanerror detection unit (200), in order to improve the reliability of the apparatus, the apparatus is configured in such a way that when an error occurs to certain hardware resources in the instruction processing apparatus, error detection is conducted if instructionprocessing is under way, but error detection is deterred if instruction processing is in suspension, and the scope of the error which cannot be deterred during the suspension of instruction processing is made narrower than the scope of the error which cannot be deterred during instruction processing.
Bibliography:Application Number: EP20050251346