Implantation method for a vertical transistor

• Main Authors: WANG, GENG, MCSTAY, KEVIN, WEYBRIGHT, MARY, ELIZABETH, CHIDAMBARRAO, DURESETI, LI, YUJUN
• Format: Patent
• Language: English; French; German
• Published: 28.12.2011
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of formation of a deep trench vertical transistor is provided. A deep trench with a sidewall in a doped semiconductor substrate is formed. The semiconductor substrate includes a counterdoped drain region in the surface thereof and a channel alongside the sidewall. The drain region has a top level and a bottom level. A counterdoped source region is formed in the substrate juxtaposed with the sidewall below the channel. A gate oxide layer is formed on the sidewalls of the trench juxtaposed with a gate conductor. Perform the step of recessing the gate conductor below the bottom level of the drain region followed by performing angled ion implantation at an angle theta+delta with respect to vertical of a counterdopant into the channel below the source region and performing angled ion implantation at an angle theta with respect to vertical of a dopant into the channel below the source.