TESTING OF INTEGRATED CIRCUITS

An integrated circuit with a test interface contains a boundary scan chain with cells ( 14 ) coupled between a test data input (TDI) and output (TDO) in a shift register structure. Each cell ( 14 ) is also coupled between a respective one of the terminals ( 16 ) and the core circuit ( 10 ). A test c...

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Bibliographic Details
Main Authors VAN DER HEYDEN, FRANK, WAAYERS, THOMAS, F, VAN DE LOGT, LEON, M., A
Format Patent
LanguageEnglish
French
German
Published 16.11.2005
Edition7
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:An integrated circuit with a test interface contains a boundary scan chain with cells ( 14 ) coupled between a test data input (TDI) and output (TDO) in a shift register structure. Each cell ( 14 ) is also coupled between a respective one of the terminals ( 16 ) and the core circuit ( 10 ). A test control circuit (TAP_C) supports an instruction to switch the boundary scan chain to a mode in which mode selectable first ones of the cells ( 14 ) transport data serially along the boundary scan chain while selectable second ones of the cells ( 14 ) write or read data that has been or will be transported through the first ones of the cells ( 14 ) in the further mode to or from the terminals ( 16 ) from or to the scan chain.
Bibliography:Application Number: EP20040705877