Method of forming an interconnection line structure

A method for forming an interconnection line and an interconnection line structure are disclosed. The method includes forming an interlayer insulating layer (104) on a semiconductor substrate (100), wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidat...

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Bibliographic Details
Main Authors LEE, SEUNG-JIN, SHIN, HONG-JAE, KIM, JAE-HAK, LEE, KYOUNG-WOO, WEE, YOUNG-JIN, PARK, KI-KWAN
Format Patent
LanguageEnglish
French
German
Published 24.04.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for forming an interconnection line and an interconnection line structure are disclosed. The method includes forming an interlayer insulating layer (104) on a semiconductor substrate (100), wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer (106) of e.g. SiCN is formed on the interlayer insulating layer. An oxide capping layer (108) of e.g. SiO2 is formed on the oxidation barrier layer. A via hole (112) or dual damascene pattern is formed in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern (116') is formed within the via hole or dual damascene pattern.
Bibliography:Application Number: EP20050000966