METHOD OF MANUFACTURING MULTI-LEVEL CONTACTS BY SIZING OF CONTACT SIZES IN INTEGRATED CIRCUITS

A method for forming an integrated circuit includes etching a first opening to a first depth in a dielectric material over a semiconductor device on a first semiconductor substrate and etching a second opening to a second depth in the dielectric material over the first semiconductor substrate. The f...

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Bibliographic Details
Main Authors HELLIG, KAY, AMNIPUR, MASSUD
Format Patent
LanguageEnglish
French
German
Published 27.04.2005
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for forming an integrated circuit includes etching a first opening to a first depth in a dielectric material over a semiconductor device on a first semiconductor substrate and etching a second opening to a second depth in the dielectric material over the first semiconductor substrate. The first and second openings are differently sized to respectively etch to the first and second depths in about the same time due to etch lag. The first and second openings are filled with conductive material.
Bibliography:Application Number: EP20030766843