Digital-domain self-calibration and built-in self-testing techniques for high-speed integrated A/D converters using white gaussian noise
The invention concerns a design technique for self-calibrating the linearity of high-speed analog-to-digital converters (ADC). A white Gaussian noise (WGN) input stimulus is employed for generating a digital histogram at the output of the ADC. The calibrating codes are then computed from this digita...
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Main Authors | , , , , |
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Format | Patent |
Language | English French German |
Published |
03.11.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | The invention concerns a design technique for self-calibrating the linearity of high-speed analog-to-digital converters (ADC). A white Gaussian noise (WGN) input stimulus is employed for generating a digital histogram at the output of the ADC. The calibrating codes are then computed from this digital histogram using a simple digital logic unit comprising adders, registers and a read-only memory (ROM) table. The present invention can thereby reduce the complexity of the self-calibrating circuitry while enabling real-time calibration in high-speed ADCs. The white Gaussian noise generator and the calibrating logic unit can be embedded within the ADC integrated circuit and additionally be utilized as a cost-effective built-in self-testing (BIST) solution. |
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Bibliography: | Application Number: EP20030398002 |