Method for forming a void free VIA

A multilevel metal and via structure is described. The metal conductors include a base or seed layer (103) , a bulk conductor layer (106) , a capping layer (105) , and a barrier layer (108), and the via structure include a seed layer (201), a diffusion barrier layer (203) and a metal plug (205). The...

Full description

Saved in:
Bibliographic Details
Main Authors CAMPBELL, JOHN P, MONTGOMERY, CLINT L, GRIFFIN, ALFRED J, EL SAYED, ADEL
Format Patent
LanguageEnglish
French
German
Published 15.09.2004
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:A multilevel metal and via structure is described. The metal conductors include a base or seed layer (103) , a bulk conductor layer (106) , a capping layer (105) , and a barrier layer (108), and the via structure include a seed layer (201), a diffusion barrier layer (203) and a metal plug (205). The via seed layer (201) is controlled to a thickness that discourages the reaction between the via seed layer (201) and the bulk conductor layer (106). The reaction may result in the formation of harmful voids at the bottom of the vias (200) and is caused by having the via seed metal (201) coming in contact with the bulk conductor (106) through openings in the barrier layer (108).
Bibliography:Application Number: EP20040100983