SILICON OXIDE LINER FOR REDUCED NICKEL SILICIDE BRIDGING

Bridging between nickel silicide layers on a gate electrode and source/drain regions along silicon nitride sidewall spacers is prevented by forming a relatively thick silicon oxide liner on the side surfaces of the gate electrode and adjacent surface of the semiconductor substrate before forming the...

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Bibliographic Details
Main Authors NGO, MINH, VAN, WOO, CHRISTY, MEIU
Format Patent
LanguageEnglish
French
German
Published 16.07.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Bridging between nickel silicide layers on a gate electrode and source/drain regions along silicon nitride sidewall spacers is prevented by forming a relatively thick silicon oxide liner on the side surfaces of the gate electrode and adjacent surface of the semiconductor substrate before forming the silicon nitride sidewall spacers thereon. Embodiments include forming a silicon dioxide liner at a thickness of about 200 Å to about 600 Å prior to forming the silicon nitride sidewall spacers thereon.
Bibliography:Application Number: EP20010977411