Input/output buffer supporting multiple I/O standards
An input/output I/O block structure for a programmable logic device, the structure including: a plurality of I/O blocks grouped into sets of I/O blocks, each set having a separate output supply voltage; a set of two or more output supply voltage pads associated with each set of I/O blocks; and confi...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
19.03.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | An input/output I/O block structure for a programmable logic device, the structure including: a plurality of I/O blocks grouped into sets of I/O blocks, each set having a separate output supply voltage; a set of two or more output supply voltage pads associated with each set of I/O blocks; and configurable means for connecting each set of I/O blocks to a respective set of the output supply voltage pads. |
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Bibliography: | Application Number: EP20020027043 |