Method for forming variable-K gate dielectric

A method for forming a gate dielectric having regions with different dielectric constants. A low-K dielectric layer is formed over a semiconductor structure. A dummy dielectric layer is formed over the low-K dielectric layer. The dummy dielectric layer and low-K dielectric layer are patterned to for...

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Bibliographic Details
Main Authors SUNDARESAN, RAVI, RAMACHANDRAMURTHY PRADEEP, YELEHANKA, QUEK, ELGIN, CHAN, LAP, KEUNG LEUNG, YING, ZHEN ZHENG, JIA, YONG MENG LEE, JAMES, PAN, YANG
Format Patent
LanguageEnglish
French
German
Published 06.08.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for forming a gate dielectric having regions with different dielectric constants. A low-K dielectric layer is formed over a semiconductor structure. A dummy dielectric layer is formed over the low-K dielectric layer. The dummy dielectric layer and low-K dielectric layer are patterned to form an opening. The dummy dielectric layer is isentropically etched selectively to the low-K dielectric layer to form a stepped gate opening. A high-K dielectric layer is formed over the dummy dielectric and in the stepped gate opening, A gate electrode is formed on the high-K dielectric layer.
Bibliography:Application Number: EP20020368011