Microcomputer debug architecture and method

A set of watchpoints are defined in a computer system, each including a programmable precondition register that stores a set of precondition codes, wherein the set or precondition codes is identical for each watchpoint in the set of watchpoints and a programmable action register stores a set of acti...

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Bibliographic Details
Main Author EDWARDS, DAVID ALAN
Format Patent
LanguageEnglish
French
German
Published 04.08.2010
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:A set of watchpoints are defined in a computer system, each including a programmable precondition register that stores a set of precondition codes, wherein the set or precondition codes is identical for each watchpoint in the set of watchpoints and a programmable action register stores a set of action codes, the set of action codes is identical for each watchpoint in the set of watchpoints, and a first comparator, having inputs coupled to the precondition register, compares at least one precondition code in the set of precondition codes with a first data value in the computer system and provides a signal to the action register in response thereto.
Bibliography:Application Number: EP20000308364