PROTECTION CIRCUIT FOR AN INTEGRATED CIRCUIT

The invention is directed to a protective circuit for an integrated circuit 1. This protective circuit is preferably arranged in a plurality of circuit levels 2, 3 under and/or above the intergrated circuit 1. It exhibits a plurality of interconnects 10, 11 that are charged with different signals of...

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Bibliographic Details
Main Authors RICHTER, MICHAEL, OTTERSTEDT, JAN, SMOLA, MICHAEL, EISELE, MARTIN
Format Patent
LanguageEnglish
French
German
Published 22.11.2000
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
GENERATION
HANDLING RECORD CARRIERS
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PRESENTATION OF DATA
RECOGNITION OF DATA
RECORD CARRIERS
SEMICONDUCTOR DEVICES
TESTING
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:The invention is directed to a protective circuit for an integrated circuit 1. This protective circuit is preferably arranged in a plurality of circuit levels 2, 3 under and/or above the intergrated circuit 1. It exhibits a plurality of interconnects 10, 11 that are charged with different signals of one or more signal generators. The different signals, after traversing the interconnects 10, 11, are analyzed with one or more detectors in that the signals received by detectors are respectively compared to rated reference signals, and an alarm signal is forwarded to the integrated circuit given the presence of a significant difference. On the basis of this alarm signal, the integrated circuit is switched into a security mode that makes an analysis or a manipulation of the integrated circuit practically impossible.
Bibliography:Application Number: EP19990957280