CONNECTION TEST METHOD

The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (110) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output...

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Bibliographic Details
Main Authors DE JONG, FRANCISCUS, G., M, MURIS, MATHIAS, N., M, DE WILDE, JOHANNES, SCHUTTERT, RODGER, F
Format Patent
LanguageEnglish
French
German
Published 26.08.2009
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (110) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (110) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (195) between an IC pin (110) and a supply line, e.g. a ground line.
Bibliography:Application Number: EP19990900246