Division circuit and method

A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruct...

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Main Authors FUJITA, SHUYA, KAWASAKI, SHUMPEI, SUGAWARA, TADAHIKO, NOGUCHI, KOUKI, ASANO, YOICHI, CHAKI, HIDEAKI, KURAKAZU, KEIICHI, KIHARA, TOSHIMASA, TSUKAMOTO, TAKASHI, MASUMURA, SHIGEKI, ISHIDA, KATSUHIKO, BABA, SHIRO, TAWARA, YASUHIRO, SAKAKIBARA, EIJI, YAMAZAKI, TAKANAGA, NORIKO, SAWA, KAINAGA, MASAHIRO, FUKADA, KAORU, KASHIWAGI, YUGO, AKAO, YASUSHI
Format Patent
LanguageEnglish
French
German
Published 02.01.2002
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
Bibliography:Application Number: EP19980120014