Store instruction forwarding technique with increased forwarding probability
Provided are a system and method for forwarding a first instruction in a processor. The processor comprises an execution unit and provides a plurality of instructions. The first instruction depends upon execution of a second instruction but does not otherwise require execution by the execution unit....
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
16.07.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | Provided are a system and method for forwarding a first instruction in a processor. The processor comprises an execution unit and provides a plurality of instructions. The first instruction depends upon execution of a second instruction but does not otherwise require execution by the execution unit. The method first searches for the second instruction and then forwards the first instruction via the second instruction. One embodiment of the method and system forwards a store instruction in a processor. The store instruction has a source address. The processor provides a plurality of instructions. The method searches for a floating point instruction that is provided before the store instruction. The floating point instruction has a target address. The method then determines if the source address is equal to the target address. The method forwards the store instruction through the floating point instruction if the source address is equal to the target address. |
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Bibliography: | Application Number: EP19980303037 |