Semiconductor housing comprising a plurality of chips

• Main Authors: TOBA, SUSUMU, SOYANO, SHIN
• Format: Patent
• Language: English; French; German
• Published: 16.08.2001
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of protecting during transportation or packaging the lead pins and guide pins of a semiconductor device which comprises an insulating casing (10) in the form of a frame (12) and having opposed end openings and an inner face; a lead pin block (80) having a base (81) with a plurality of lead pins (P1-P16) standing thereon, the lead pin block (80) being installed on the inner face of the frame, and the lead pins (P1-P16) having respective inner leads; a radiator base plate (20) closing a first end opening of the insulating casing; a circuit board (30,31) whereon are mounted semiconductor chips (32,34) connected to the ends (B) of the inner leads, the circuit board (30,31) being bonded to the interior face of the radiator base plate (20); a gel resin sealant (50) in which the circuit board (30,31) and the inner leads are immersed, the gel resin sealant (50) substantially filling the inner space of the insulating casing; an insulating cover plate (60) closing the second end opening of the insulating casing (10); characterised by locating a sheath block (90) having a plurality of lead holes (h1 to h22) and a plurality of guide holes (H1,H2) into which said lead pins (P1-P16) and guide pins (G1,G2) can respectively be freely inserted and removed over said lead and guide pins.