Data processor having operating modes selected by at least one mask option bit and method therefor
A data processor (20) includes a nonvolatile memory system (25) which stores not only normal program memory (31), but also mask option bits (32), within a common array (30) of nonvolatile memory cells. A control circuit (40) of the nonvolatile memory system (25) detects when a central processing uni...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
02.05.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A data processor (20) includes a nonvolatile memory system (25) which stores not only normal program memory (31), but also mask option bits (32), within a common array (30) of nonvolatile memory cells. A control circuit (40) of the nonvolatile memory system (25) detects when a central processing unit (21) is accessing the program memory (31). In response to either an end of reset signal or a refresh request signal, the control circuit (40) copies the mask option bits (32) into a volatile mask option register (44) only when the central processing unit (21) is not accessing the program memory (31). Otherwise, the control circuit (40) holds off the access to the mask option bits (32). The mask option register (44) provides signals to various circuits (28) to control their operation. Thus, the mask option bits (32) may be stored in nonvolatile form in the same array (30) as the program memory (31), enhancing reliability and reducing integrated circuit size. |
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Bibliography: | Application Number: EP19950115026 |