Novolatile semiconductor memory cell capable of saving overwritten cell and its saving method

If data is read from a selected memory cell (MC1 to MCn) at the time of overwrite verifying, a potential of a bit line is changed in accordance with data. If a transistor (Q1) is turned on, a latch circuit (LT) is set in accordance with data of the bit line (BL1). In a case where there is a memory c...

Full description

Saved in:
Bibliographic Details
Main Authors IMAMIYA, KENITI, NAKAMURA, HIROSHI
Format Patent
LanguageEnglish
French
German
Published 19.08.1998
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:If data is read from a selected memory cell (MC1 to MCn) at the time of overwrite verifying, a potential of a bit line is changed in accordance with data. If a transistor (Q1) is turned on, a latch circuit (LT) is set in accordance with data of the bit line (BL1). In a case where there is a memory cell being in an overwrite state, data of the selected memory cell is latched to the latch circuit (LT), and data corresponding to one page is erased. Thereafter, a normally writing operation is executed by data latch to the latch circuit (LT), thereby the memory cell being in the overwrite state can be used as a normal threshold voltage.
Bibliography:Application Number: EP19950115454