Integrated microprocessor
An integrated processor is provided wherein the layouts from a standalone microprocessor and one or more functional units are situated on a common semiconductor die and are linked by a common local bus. A testing circuit, also situated on the die and coupled to the common bus, is responsive to test...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
10.05.1995
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | An integrated processor is provided wherein the layouts from a standalone microprocessor and one or more functional units are situated on a common semiconductor die and are linked by a common local bus. A testing circuit, also situated on the die and coupled to the common bus, is responsive to test command signals originating external to the integrated processor. When the testing circuit receives these externally originated command signals from a host computer, it generates local bus cycles which exercise the standalone microprocessor or the functional unit and/or devices attached thereto. In one embodiment, the integrated processor is incorporated on the motherboard of a target computer which is linked by a JTAG or other testing protocol bus to a host computer. The host computer generates the test command signals which are sent to and received by the testing circuit in the integrated processor. A debug memory space is reserved in the main system memory of the target computer for storage of debug software which is downloaded from the host computer. The debug software thus stored is executed when the processor on the target computer enters a debug mode. |
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Bibliography: | Application Number: EP19940307736 |