Polishstop planarization method and structure

The invention provides a method for producing a substantially planar surface overlying features (40) of a semiconductor structure (38). The method comprises forming alternating layers of a hard polishing material (40,48) and a soft polishing material (46,50) the features (40) of the semiconductor st...

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Bibliographic Details
Main Authors LEACH, MICHAEL ALBERT, BURKE, PETER AUSTIN
Format Patent
LanguageEnglish
French
German
Published 26.10.1994
Edition5
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The invention provides a method for producing a substantially planar surface overlying features (40) of a semiconductor structure (38). The method comprises forming alternating layers of a hard polishing material (40,48) and a soft polishing material (46,50) the features (40) of the semiconductor structure (38), and then polishing the alternating layers to form a substantially planar surface over the features (40).
Bibliography:Application Number: EP19940104346