Semiconductor memory device
A semiconductor memory device includes a silicon chip (1) and sub-arrays (A, B) formed in the chip (1). In each of the sub-arrays (A, B), memory cells arranged in a matrix form, word lines (WLA, WLB) provided for respective rows of each of the sub-arrays, and bit lines (BLA, BLB) provided for respec...
Saved in:
Main Authors | , , , , , , |
---|---|
Format | Patent |
Language | English French German |
Published |
24.11.1993
|
Edition | 5 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A semiconductor memory device includes a silicon chip (1) and sub-arrays (A, B) formed in the chip (1). In each of the sub-arrays (A, B), memory cells arranged in a matrix form, word lines (WLA, WLB) provided for respective rows of each of the sub-arrays, and bit lines (BLA, BLB) provided for respective columns of each of the sub-arrays are arranged. Further, in the chip (1), amplifier groups (14A, 14B) for amplifying data read out from the memory cells are arranged for the respective sub-arrays. Amplifiers (16A, 16B) connected to respective bit lines are provided in the amplifier groups (14A, 14B) and the amplifiers (16A, 16B) each have a function of continuously holding data read out from the memory cell. |
---|---|
Bibliography: | Application Number: EP19930108283 |