Semiconductor memory device

A semiconductor memory device includes a silicon chip (1) and sub-arrays (A, B) formed in the chip (1). In each of the sub-arrays (A, B), memory cells arranged in a matrix form, word lines (WLA, WLB) provided for respective rows of each of the sub-arrays, and bit lines (BLA, BLB) provided for respec...

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Bibliographic Details
Main Authors STARK, DONALD C, SAKURAI, KIYOFUMI, OHSHIMA, SHIGEO, KUSHIYAMA, NATSUKI, NOJI, HIROYUKI, TAKASE, SATORU, FURUYAMA, TOHRU
Format Patent
LanguageEnglish
French
German
Published 24.11.1993
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A semiconductor memory device includes a silicon chip (1) and sub-arrays (A, B) formed in the chip (1). In each of the sub-arrays (A, B), memory cells arranged in a matrix form, word lines (WLA, WLB) provided for respective rows of each of the sub-arrays, and bit lines (BLA, BLB) provided for respective columns of each of the sub-arrays are arranged. Further, in the chip (1), amplifier groups (14A, 14B) for amplifying data read out from the memory cells are arranged for the respective sub-arrays. Amplifiers (16A, 16B) connected to respective bit lines are provided in the amplifier groups (14A, 14B) and the amplifiers (16A, 16B) each have a function of continuously holding data read out from the memory cell.
Bibliography:Application Number: EP19930108283