Register allocation in an information processing apparatus

In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating address part (12) in which the assignment (13) of an area register (21) having a register address (i) of a register area as its value and th...

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Main Authors TOYAMA, KEISUKE, NOJIRI, TOHRU, WATANABE, TAN, KURAKAZU, KEIICHI, KASHIWAGI, YUGO
Format Patent
LanguageEnglish
French
German
Published 09.12.1992
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Abstract In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating address part (12) in which the assignment (13) of an area register (21) having a register address (i) of a register area as its value and the assignment (14) of a register displacement value (d) expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part (103) for designating the main memory is provided in the same instruction.
AbstractList In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating address part (12) in which the assignment (13) of an area register (21) having a register address (i) of a register area as its value and the assignment (14) of a register displacement value (d) expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part (103) for designating the main memory is provided in the same instruction.
Author KASHIWAGI, YUGO
NOJIRI, TOHRU
TOYAMA, KEISUKE
WATANABE, TAN
KURAKAZU, KEIICHI
Author_xml – fullname: TOYAMA, KEISUKE
– fullname: NOJIRI, TOHRU
– fullname: WATANABE, TAN
– fullname: KURAKAZU, KEIICHI
– fullname: KASHIWAGI, YUGO
BookMark eNrjYmDJy89L5WSwCkpNzywuSS1SSMzJyU9OLMnMz1PIzFNIBJFp-UW5EJGCovzk1OLizLx0hcSCgsSixJLSYh4G1rTEnOJUXijNzaDg5hri7KGbWpAfn1pckJicmpdaEu8aYGBqaG5kYeRoaEyEEgBglDD-
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
DocumentTitleAlternate Registerzuweisung in einer Informationsverarbeitungsvorrichtung.
Attribution des registres dans un dispositif de traitement d'information.
ExternalDocumentID EP0517282A1
GroupedDBID EVB
ID FETCH-epo_espacenet_EP0517282A13
IEDL.DBID EVB
IngestDate Fri Jul 19 17:17:39 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
French
German
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_EP0517282A13
Notes Application Number: EP19920110395
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19921209&DB=EPODOC&CC=EP&NR=0517282A1
ParticipantIDs epo_espacenet_EP0517282A1
PublicationCentury 1900
PublicationDate 19921209
PublicationDateYYYYMMDD 1992-12-09
PublicationDate_xml – month: 12
  year: 1992
  text: 19921209
  day: 09
PublicationDecade 1990
PublicationYear 1992
RelatedCompanies HITACHI, LTD
RelatedCompanies_xml – name: HITACHI, LTD
Score 2.4191525
Snippet In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating...
SourceID epo
SourceType Open Access Repository
SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title Register allocation in an information processing apparatus
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19921209&DB=EPODOC&locale=&CC=EP&NR=0517282A1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3JasMwEB1Cut5atyXphg7FN1PjRXYKpjReCIUkJqQltyBbNvjimNihv9-R4ri9tBchJBhGgtGsbwTw5OauTbmjaynlpmYZRq651B5pjBvU1FGeOBehgemMTj6s95W96kFxwMLIPqFfsjkiSlSK8t7I97r6CWIFsrayfk4KXNq8RksvUHkLFzMEFFQNxl4Yz4O5r_o-ztTZwhOtqNC7eENH6QitaEf6bJ9jAUqpfmuU6AKOYyRWNpfQy0oFzvzDx2sKnE7bfLcCJ7JAM61xsRXC-gpeFplA7WRbIpLme25JURImxg6MSKo9BABVE2GV7PC9q6-BROHSn2jIzro7-jqMO8bNG-iXmzIbAGEuzXKq53aSoIGfO8ymDmOGaxscrSFmDWH4J5nbf_bu4FxWo4pqjdE99JvtLntAndskj_K2vgEjZ4a9
link.rule.ids 230,309,783,888,25577,76883
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3Na8IwFH-I-3C3rdvQfeYweiuTamMdlDH7QbdpLeKGN0lNC73UYiv79_cSa7fLdgkhgcdL4OV9_l4AHszENCgfdLUV5T2tr-uJZlJjqDGu014X5YlzERqYBNT_6L8tjEUD0j0WRvYJ_ZLNEVGiVijvpXyv858gliNrK4vHKMWl9bM3txyVV3AxXUBBVWdkueHUmdqqbeNMDWaWaEWF3sULOkoHaGGb0lP6HAlQSv5bo3incBgisaw8g0acKdCy9x-vKXA8qfLdChzJAs1VgYuVEBbn8DSLBWon3hCRNN9xS9KMMDHWYESS7yAAqJoIy2WH721xAcRz57avITvL-uhLN6wZ711CM1tncRsIM2mc0G5iRBEa-MmAGXTAmG4aOkdriPU70PmTzNU_e_fQ8ueT8XL8Grxfw4msTBWVG8MbaJabbXyL-reM7uTNfQOcO4mt
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Register+allocation+in+an+information+processing+apparatus&rft.inventor=TOYAMA%2C+KEISUKE&rft.inventor=NOJIRI%2C+TOHRU&rft.inventor=WATANABE%2C+TAN&rft.inventor=KURAKAZU%2C+KEIICHI&rft.inventor=KASHIWAGI%2C+YUGO&rft.date=1992-12-09&rft.externalDBID=A1&rft.externalDocID=EP0517282A1