Register allocation in an information processing apparatus

In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating address part (12) in which the assignment (13) of an area register (21) having a register address (i) of a register area as its value and th...

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Bibliographic Details
Main Authors TOYAMA, KEISUKE, NOJIRI, TOHRU, WATANABE, TAN, KURAKAZU, KEIICHI, KASHIWAGI, YUGO
Format Patent
LanguageEnglish
French
German
Published 09.12.1992
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In a computer system equipped with a large number of registers (R, Q) which have an access time much shorter than that of a main memory, a register designating address part (12) in which the assignment (13) of an area register (21) having a register address (i) of a register area as its value and the assignment (14) of a register displacement value (d) expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part (103) for designating the main memory is provided in the same instruction.
Bibliography:Application Number: EP19920110395