A FLEXIBLE REDUNDANCY ARCHITECTURE AND FUSE DOWNLOAD SCHEME

A download system for programming decoders for redundancy. Auxiliary fuse banks (10, 15) have sets of nonvolatile storage elements, such as fuses that store logic states that (a) select a redundant decoder and (b) indicate the address of a faulty row/column of memory cells (MEMORY MARCO n). When the...

Full description

Saved in:
Bibliographic Details
Main Authors TOMASHOT, STEVEN WILLIAM, HILTEBEITEL, NATHAN RAFAEL, PONTIUS, DALE EDWARD
Format Patent
LanguageEnglish
Published 21.07.1993
Edition5
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SWITCHES
ELECTRICITY
EMERGENCY PROTECTIVE DEVICES
INFORMATION STORAGE
PHYSICS
RELAYS
SELECTORS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:A download system for programming decoders for redundancy. Auxiliary fuse banks (10, 15) have sets of nonvolatile storage elements, such as fuses that store logic states that (a) select a redundant decoder and (b) indicate the address of a faulty row/column of memory cells (MEMORY MARCO n). When the chip (100) is first powered up, each set of nonvolatile storage elements (10A, 10B, 15A, 15Z) is accessed and downloaded to program selected redundant decoders. Because the sets of nonvolatile storage elements can be dynamically assigned to redundant decoders on an any-for-any basis, the fault tolerance of the redundancy system is enhanced.
Bibliography:Application Number: EP19910118971