EP0486194

A memory system including a circuit for receiving and serially storing a plurality of instructions and a plurality of buffer memories each including a buffer controller 800, 820 for regulating access to that buffer. Also included is a circuit 830, connected to each buffer controller and said receivi...

Full description

Saved in:
Bibliographic Details
Main Authors JOHNSON, LEE EDWARD, JR, KOKOSZKA, DARYL JOHN, LARKY, STEVEN PHILIP
Format Patent
LanguageEnglish
Published 26.01.1994
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:A memory system including a circuit for receiving and serially storing a plurality of instructions and a plurality of buffer memories each including a buffer controller 800, 820 for regulating access to that buffer. Also included is a circuit 830, connected to each buffer controller and said receiving circuit, for accessing one or more of said buffers in response to a first serially stored instruction while, in response to at least one other serially stored instruction, accessing at least one remaining buffer.
Bibliography:Application Number: EP19910310160