MEMORY CONTROL DEVICE

A memory control device for controlling a random access memory provides with an arbiter for generating write start and read start signals in response to WRITE and READ commands which are obtained by frequency-dividing writing and reading clock signals, respectively and a memory control circuit compr...

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Bibliographic Details
Main Authors SAKAGAMI, MASAHIKO, MAEYAMA, YOSHIKAZU
Format Patent
LanguageEnglish
Published 14.10.1992
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory control device for controlling a random access memory provides with an arbiter for generating write start and read start signals in response to WRITE and READ commands which are obtained by frequency-dividing writing and reading clock signals, respectively and a memory control circuit comprised of first and second delay circuits for delaying the write start and read start signals by predetermined times, respectively, and first and second RS flip-flop circuits for generating write and read control signals in response to the write start and read start signals, respectively, which are reset by reset signals output from the first and second delay circuits, respectively.
Bibliography:Application Number: EP19910110897