Worldline driver circuit for nonvolatile memory cell array

• Main Authors: STEIGLER, HARVEY J, ASHMORE, BENJAMIN H., JR, TRUONG, PHAT C, SCHRECK, JOHN F
• Format: Patent
• Language: English; French; German
• Published: 30.10.1991
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

A circuit 22 for driving a wordline (WORDLINE) in a floating-gate-type nonvolatile memory cell array, including a read-driver subcircuit (PART A) for switching a positive read voltages (Vcc) and a program-driver subcircuit (PART B) for switching positive programming voltages (Vppsw,Vhssw). The circuit (22) also includes a subcircuit (T11) for switching negative erasing voltages (Vee). The read-driver subcircuit (PART A) may be constructed using relatively short-channel transistors (T1-5) for relatively high speed of operation when connected to high-capacitance wordlines (WORDLINE). On the other hand, the program-driver subcircuit (PART B) may be constructed using relatively long-channel transistors and those long-channel transistors may be located on the memory chip remotely from the memory cells and from the read-driver circuit (PART A). P-channel isolating transistors (T6,T7,T11) are used to isolate unused circuitry during operation. The program-driver circuit (PART B) includes a voltage translator subcircuit (TR) having a transistor configuration that lessens the probability that the breakdown voltages of those transistors (T12-19) will be exceeded.