Method for manufacturing a semiconductor device

• Main Authors: MAEDA, TAKEO, HIGASHIZONO, MASAYOSHI
• Format: Patent
• Language: English; French; German
• Published: 19.09.1990
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A semiconductor device for use in a hybrid LSI circuit is disclosed which comprises MOSFETs and at least two bipolar transistor -- all formed on the same semiconductor substrate. More specifically, P<+>-type buried diffusion layers (66) and P<+>-type buried diffusion layers (68) are formed on a P-type semiconductor substrate (60). An N-type epitaxial layer (70) is formed on these buried layers (66, 68). N-type well-regions (72a, 72b) and a P-type well-region (74) are formed in the selected portions of the N-type epitaxial layer (70). A P-channel MOSFET and an N-channel MOSFET are formed in the N-type well-region (72a) and the P-type well-region (74), respectively. A first bipolar transistor is formed on the N-type epitaxial layer (70). A second bipolar transistor is formed on the N-type well-region (72b) which has an impurity concentration higher than that of the N-type epitaxial layer (70).