CAPACITIVE REDUCTION OF JUNCTIONS IN A SEMICONDUCTOR DEVICE
The invention is for a metal oxide semiconductor device whose operative speed is increased as a result of the reduction in "bottom wall" capacitance of a junction, which capacitance is achieved without influencing the short channel, punch through characteristics.
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
02.01.1991
|
Edition | 5 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | The invention is for a metal oxide semiconductor device whose operative speed is increased as a result of the reduction in "bottom wall" capacitance of a junction, which capacitance is achieved without influencing the short channel, punch through characteristics. |
---|---|
Bibliography: | Application Number: EP19890309263 |