METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING CMOS AND HIGH-VOLTAGE ELECTRONIC DEVICES

This method, requiring a reduced number of process phases and providing an efficient, high-voltage structure, comprises forming a P-well region of the N-channel transistor of a CMOS device, by means of boron atom implant through a protective mask, forming at least one insulation region surrounding t...

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Bibliographic Details
Main Authors GALBIATI, PAOLA, CONTIERO, CLAUDIO, ANDREINI, ANTONIO
Format Patent
LanguageEnglish
Published 15.11.1989
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:This method, requiring a reduced number of process phases and providing an efficient, high-voltage structure, comprises forming a P-well region of the N-channel transistor of a CMOS device, by means of boron atom implant through a protective mask, forming at least one insulation region surrounding the CMOS device, forming edge regions having the same conductivity type as the insulation region but with a smaller concentration of impurities on at least one part of the insulation region and in the high-voltage electronic devices by means of the same boron atom implant used to form the P-well region.
Bibliography:Application Number: EP19870104271