Nichtflüchtige Halbleiterspeicheranordnung

A non-volatile semiconductor memory device according to the present invention comprises a memory cell array (30) in which a plurality of electrically rewritable memory cells for storing multi-value data representing three or more data, a plurality of bit lines (31), respectively coupled to the plura...

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Bibliographic Details
Main Authors OHUCHI, KAZUNORI, TANAKA, TOMOHARU, HEMINK, GERTJAN
Format Patent
LanguageGerman
Published 27.09.2001
Edition7
Subjects
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Summary:A non-volatile semiconductor memory device according to the present invention comprises a memory cell array (30) in which a plurality of electrically rewritable memory cells for storing multi-value data representing three or more data, a plurality of bit lines (31), respectively coupled to the plurality of memory cells, for transmitting/receiving data to/from the memory cells, a plurality of sense amplifiers (32) for sensing/amplifying potentials of the bit lines, a plurality of data latches (33) for holding data to be written in the memory cells, a plurality of verify means (34) for checking whether data are correctly written in the memory cells, a plurality of switch means (35) for controlling to connect the plurality of sense amplifiers, the plurality of data latches, and the plurality of verify means to the bit lines, and write control means (40) for setting potentials of the bit lines in accordance with contents of the plurality of data latches. The plurality of switch means are set in an open state after data are read from the memory cells onto the bit lines, and the plurality of sense amplifiers almost simultaneously operate after the plurality of switch means are set in an open state to sense/amplify the data read onto the bit lines.
Bibliography:Application Number: DE19956020902T