Verfahren zur Bildung einer Halbleiteranordnung
The present invention includes a semiconductor device having a layer (21, 161, 61, 81, 111, 121, 125, 133, and 137) including an elemental metal and its conductive metal oxide, wherein the layer is capable being oxidized or reduced preferentially to an adjacent region of the device. The present inve...
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Main Authors | , , |
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Format | Patent |
Language | German |
Published |
17.02.2005
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | The present invention includes a semiconductor device having a layer (21, 161, 61, 81, 111, 121, 125, 133, and 137) including an elemental metal and its conductive metal oxide, wherein the layer is capable being oxidized or reduced preferentially to an adjacent region of the device. The present invention also includes processes for forming the devices. Substrate regions (11), silicon-containing layers (132), dielectric layers (41, 101, 122, and134), electrodes (135), barrier layers (141 and144), contact and via plugs (13, 142, 34, and 132), interconnects(145), and ferroelectric capacitors may be protected by and/or formed with the layer. Examples of elemental metals and their conductive metal oxides that may be used with the present invention are: ruthenium and ruthenium dioxide, rhenium and rhenium dioxide, iridium and iridium dioxide, osmium and osmium tetraoxide, or the like. |
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Bibliography: | Application Number: DE19946033582T |