TESTVORRICHTUNG MIT EINER EINRICHTUNG ZUR WELLENFORM-FORMATIERUNG

A waveform formatter according to the present invention includes a first delay circuit for delaying a set signal to control the timing of a first change point of a test signal, a second delay circuit for delaying a reset signal to control the timing of a second change point of the test signal change...

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Bibliographic Details
Main Author NEGISHI, TOSHIYUKI
Format Patent
LanguageGerman
Published 11.09.2008
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Summary:A waveform formatter according to the present invention includes a first delay circuit for delaying a set signal to control the timing of a first change point of a test signal, a second delay circuit for delaying a reset signal to control the timing of a second change point of the test signal changed by the set signal which the first delay circuit delays, a third delay circuit for delaying a set signal to control the timing of a third change point of the test signal, a fourth delay circuit for delaying a reset signal to control the timing of a fourth change point of the test signal changed by the set signal which is delayed by the third delay circuit, a fifth delay circuit for delaying a set signal to control the timing of a first change point of an enable signal of the driver, a sixth delay circuit for delaying a reset signal to control the timing of a second change point of an enable signal with regard to the driver during a predetermined cycle of a cycle reference signal.
Bibliography:Application Number: DE20046010136T